AV103

High speed data conversion& signal processing solutions

Carrier

Real Time Processing, EW, Radar, LIDAR

3U VPX
Virtex 6 FPGA
FMC Carrier, High Pin Count
Conduction or Air-Cooled

User programmable Xilinx® Virtex® 6 LX195T/SX475T FPGA
350 MHz 2M x 36 QDRII+ SRAM
One FMC slot, High Pin Count
Embedded microcontroller for monitoring and supervision
3U VPX form factor
OpenVPX standard compliant
Air cooled and Conduction cooled rugged versions
FPGA firmware cores
Windows® and Linux® drivers

Functions

FPGA Processing

Applications

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The AV103 is part of ApisSys' range of High Speed data conversion and signal processing solutions based on the VITA 46, VPX standard.

The AV103 is fully compliant with OpenVPX standard with capabilities to accommodate communication protocols such as PCIe, SRIO, 1Gbit and XAUI 10Gbit Ethernet, as well as non OpenVPX adopted standards such as Aurora or SATA.

The AV103 combines the high processing power delivered by Xilinx® Virtex® 6 FPGA with the flexibility of 3U VPX and FMC mezzanine standards making it ideally suited for embedded signal processing applications such as Electronic Warfare, Ultra Wideband Radar Receivers or LIDAR.

The AV103 includes one Xilinx® Virtex® 6 FPGA LX195T/LX240T/SX315T or SX475T for an impressive processing capability of up to 1 TMACs (Multiply Accumulate per second), one high speed 2M36 QDRII+ SRAM memory for data processing and two FLASH memories for multiple firmware storage.

The AV103 provides a 32-bit microcontroller with USB 2.0 and 10/100 Ethernet interfaces intended to be used for system monitoring and supervision.

The AV103 comes with complete software drivers for Windows and Linux. An FPGA firmware package is provided including all cores necessary to build user FPGA applications.

FPGA

The AV103 is fitted with a Xilinx Virtex 6 LX195T/LX240T/SX315T or SX475T user programmable FPGA. Only few resources are used to control and communicate with external hardware such as QDRII+ SRAM and monitoring sub-system, leaving most of the logic and block RAM and all DSP resources available for customer processing.Dedicated to signal processing, the Xilinx Virtex 6 LX195T FPGA includes 199,680 logics cells, 344 bloc RAM (36 Kbit each), 640 DSP48E1 slices, 2 PCIe interface blocs and 4 10/100/1000 Ethernet MAC blocs.The most powerful version embeds a Xilinx Virtex 6 SX475T which provides 476,160 logics cells, 1,064 bloc RAM and 2,016 DSP48E1 slices for an impressive processing power of up to 1 TMACs.The FPGA is delivered in -2 speed grade.

QDRII+ SRAM Memory

The AV103 includes one 2M36 QDRII+ SRAM memory clocked at 350 MHz for a peak data rate of 6.3 GB par second.

FLASH Memory

The AV103 includes one 128 Mbit SelectMAP FLASH memory and one 1 Gbit BPI FLASH used to store multiple FPGA configuration files.

VPX interface

The AV103 features an OpenVPX VITA 65 compliant interface with support for two Fat Pipes for Data Plane, one Fat Pipe for Expansion Plane, two Ultra Thin Pipes for Control Plane and two User Defined Ultra Thin Pipes on P1. The AV103 also supports a USB2.0, a 10/100 Ethernet and 28 LVDS differential pairs on P2.

FMC interface

The AV103 features a VITA 57 – FMC (FPGA Mezzanine Card) compliant slot.The FMC supports High Pin Count (HPC) interface with up to 80 differential signal pairs.The FMC interface also supports 4 high-speed serial links (FPGA GTXs) running at up to 6.25 Gbit/s in full duplex mode.

GTX Clock Generation

The AV103 features two low phase noise clock generators able to synthesize clock references for the FPGA GTXs from 100 MHz to 312.5 MHz, allowing support of all major protocols such as Aurora, GigE, PCIe Gen 1 and Gen 2, SATA, SRIO and XAUI 10Gbit Ethernet up to 6.25 Gbps.An on board EEPROM is used to store the clock generators customer default settings.

Microcontroller

The AV103 features a 32-bit 80 MHz microcontroller used primarily for board monitoring and supervision.The microcontroller supports a USB 2.0 and a 10/100 Ethernet interfaces accessible on the VPX P2 user IO pins through an ApisSys RT101 Rear Transition Module or an ANSI/VITA 46.10 compliant custom RTM board.The microcontroller firmware includes all necessary features for board monitoring and supervision, including FPGA firmware downloads through Ethernet or USB.

Firmware

The AV103 comes with a firmware package which includes VHDL cores allowing control and communication with all AV103 hardware resources.A base design is provided which demonstrates the use of the AV103 and gives users a starting point for firmware development.The AV103 firmware package is supported on the Xilinx ISE® 12 design suite and later.

Software

The AV103 is delivered with control software for Windows XP and 7, and Linux.An application example is provided as source code.

Ruggedization

The AV103 is delivered in air-cooled and conduction cooled standard or rugged versions for use in severe environmental conditions.Standard VITA 47 supported ruggedization levels are EAC4, EAC6 and ECC3.

FPGA

FPGA: Xilinx Virtex 6

XC6VLX195T-2FFG1156 or

XC6VLX240T-2FFG1156 or

XC6VSX315T-2FFG1156 or

XC6VSX475-2FFG1156

Memory

1 bank 2M x 36-bit QDRII+ SRAM, 350 MHz clock

128 Mbit Platform Flash XL used in Slave SelectMap mode

One 1 Gbit NOR FLASH memory used in 8-bit BPI mode

Microcontroller

32-bit PIC32 with 512 MB FLASH

Board configuration and monitoring

USB2.0 interface on VPX P2

10/100 Ethernet on VPX P2

Power supply and Temperature monitoring

I2C interface on VPX (SMbus) and

FMC