AS103

16-bit 370 Msps ADC

The AS103 Analog to Digital conversion is performed by one Texas Instrument ADC16DX370 16-bit 370 Msps ADCs. The AS103 provides one front panel SMPM connector for analog input. Single ended input signal is AC coupled with an input bandwidth from 4.5 MHz to 300 MHz with 9 dBm input level.

16-bit 2.5 Gsps DAC

The AS103 Digital to Analog conversion is performed by a Dual 16-bit 2.5 Gsps DAC with independent Digital Up Converters with interpolation factor ranging from 1 to 16. The AS103 provides two front panel SMPM connectors for analog outputs. Single ended output signals are DC coupled with an output bandwidth from 0 MHz to 500 MHz with 6 dBm output level.

Clock

The AS103 provides one ultra-low jitter clock synthesizers locked on a 100 MHz internal reference. External clock from 100 MHz to 6 GHz are supported. The AS103 provides one front panel SMPM connector for clock input An external clock output is provided on SMPM connector.

Optical transceivers

The AS103 includes one firefly optical transceiver with 12 Tx and 12 Rx optical fiber interfaces supporting up to 14Gbps per link. Optical interface is provided on MTP connector.

FPGA

The AS103 is fitted with a Xilinx® Kintex® Ultrascale+™ KU115 user programmable FPGA. Only few resources are used to control and communicate with external hardware such as DDR3 SDRAM and monitoring sub-system, leaving most of the logic and block RAM and all DSP resources available for customer processing. Dedicated to signal processing, the Xilinx Kintex Ultrascale KU115 FPGA includes 1,451 K logics cells, 2,160 36 Kbit RAM blocs, 6 PCIe interface blocs and 5,520 DSP48 slices for an impressive processing power of more than 7 TMACs. The FPGA is delivered in -2 speed grade.

VXS Interface

The AS103 supports VME A32 / D32 slave access with interrupt generation capabilities. CR/CSR configuration space is supported for board configuration. The AS103 features a VXS compliant interface with support of 2x 4 serial lanes up to 12.5Gbps per link. The AS103 also supports 12 LVDS differential pairs on VXS P0 plus 13 LVDS differential pairs on VME P2 plus one trigger input on VME P2.

FMC Interface

The AS103 features two VITA 57 – FMC (FPGA Mezzanine Card) compliant slots. Each FMC slot supports High Pin Count (HPC) interface with up to 80 differential signal pairs. Each FMC interface also supports 10 high-speed serial links running at up to 12.5Gbps in full duplex.

Memories

The AS103 includes one 800 MHz 256M32 DDR3 SDRAM memory banks and one 1 Gbit QSPI FLASH used to store multiple FPGA configuration files.

Microcontroller

The AS103 features a 32-bit 80 MHz microcontroller used primarily for board monitoring and supervision. The microcontroller supports a 10/100 Ethernet interfaces accessible on the VME P2 user IO pins through an ApisSys AR108 Test Module. The microcontroller firmware includes all necessary features for board monitoring and supervision.

Firmware

The AS103 comes with a firmware package which includes VHDL cores allowing for control and communication with all AS103 hardware resources. Base designs are provided which demonstrates the use of the AS103 and gives users a starting point for firmware development. The AS103 firmware package is supported on the Xilinx VIVADO® 2016.4 design suite.

Software

The AS103 is delivered with software drivers for Windows and Linux (Ethernet) and VxWorks 6.9 (VME).

Ruggedization

The AS103 is delivered in air cooled standard or rugged versions for use in severe environmental conditions. Standard VITA 47 supported ruggedization levels are EAC4 and EAC6.

Analog Input/Output