AF101

FMC Test Board
- VITA 57 FMC form factor
- FMC LA, HA and HB differential pairs loopbacks
- FMC DP differential pairs loopbacks
- FMC clock generation
- Air cooled and Conduction cooled rugged versions
- FPGA firmware cores
Functions
- Validation
Applications
Sales request
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The AF101 is part of ApisSys' range of modular IOs solutions based on the VITA 57, FPGA Mezzanine Card standard.
The AF101 provides FMC carrier developers and assembly facilities with a tool for full characterisation of the FMC interface.
The AF101 features loopbacks on all FMC differential pairs on HPC connectors.
The AF101 provides an on board, user programmable, low jitter clock generator supporting reference clocks as required for PCIe, SATA, SRIO, Fiber Channel, Aurora, Gbit Ethernet or XAUI protocols.
The AF101 provides four on board LVDS oscillators feeding the CLK_M2C and CLK_BIDIR FMC clocks.r
FMC interface
The AF101 features a VITA 57 – FMC (FPGA Mezzanine Card) compliant slot.
The AF101 provides Tx to Rx loopbacks on the Multi-gigabit differential pairs DP0 to DP9.The AF101 provides loopbacks on the LA, HA and HB differentials pairs.
Clocks
The AF101 provides an on-board, user programmable, low jitter clock generator used to provide clock references as required for high speed serial links (Virtex® 6 GTX). The clock frequency on GBTCLK0 and GBTCLK1 can be selected among the following:
100 MHz, supporting PCIe gen 1125 MHz, supporting PCIe gen 1, GigE, Aurora and SRIO 1.25 and 2.5 Gbps150 MHz, supporting SATA156.25 MHz, supporting XAUI, SRIO and Aurora 3.125 Gbps250 MHz, supporting PCIe gen 2312.5 MHz, supporting Aurora 5 and 6.25 GbpsThe AF101 provides four on-board LVDS oscillators:
200 MHz on CLK0_M2C and CLK2_BIDIR350 MHz on CLK1_M2C and CLK3_BIDIRFirmware
The AF101 comes with a firmware package which includes VHDL cores allowing control and communication with all AF101 hardware resources.
A base design is provided that demonstrates the use of the AF101 and gives users a starting point for firmware development.
The AF101 firmware package is supported on the Xilinx ISE® 12 design suite and later.
The AF101 firmware package has been fully validated on the AV103 and other ApisSys FMC carrier products.
Ruggedization
The AF101 is delivered in air cooled and conduction cooled standard or rugged versions for used in severe environmental conditions.
Standard VITA 47 supported ruggedization levels are EAC4, EAC6 and ECC3.

AReference Clocks
Clocks
FMC interface
Firmware support
Ruggedization
Power dissipation
Weight
Part Number | A | F | 101 | - | rr | |
---|---|---|---|---|---|---|
Ruggedization level | Air Standard Air Rugged Conduction Standard Conduction Rugged | - - - - | - - - - | - - - - | - - - - | AS AR CS CR |
n
Air flow, Standard AS (VITA 47 EAC4* | Air flow, Rugged AR (VITA 47 EAC6)* | Conduction Standard CS (VITA 47 ECC3)* | Conduction Rugged CR (VITA47 ECC4)* | |
---|---|---|---|---|
Operating Temperature | 0°C to +55°C (1) (8 CFM airfl ow at sea level) | -40 to +70ºC (1) (8 CFM airfl ow at sea level) | -40°C to +70°C (Card Edge) | -40°C to +85°C (Card Edge) |
Non Operating Temperature | -40°C to +85°C | -50°C to +100°C | -50°C to +100°C | -55°C to +105°C |
Operating Vibration (Random) | 5Hz - 100Hz +3 dB/octave 100Hz-1kHz = 0.04 g2/Hz 1kHz - 2kHz -6 dB/octave | 5Hz - 100Hz +3 dB/octave 100Hz - 1kHz = 0.04 g2/Hz 1kHz - 2kHz -6 dB/octave | 5Hz - 100Hz +3 dB/octave 100Hz - 1kHz = 0.1 g2/Hz 1kHz - 2kHz -6 dB/octave | 5Hz - 100Hz +3 dB/octave 100Hz - 1kHz = 0.1 g2/Hz 1kHz - 2kHz -6 dB/octave |
Operating Shock | 20g, 11 millisecond, half-sine | 20g, 11 millisecond, half-sine | 40g, 11 millisecond, half-sine | 40g, 11 millisecond, half-sine |
Operating Relative Humidity | 0% to 95% non-condensing | 0% to 95% non-condensing | 0% to 95% non-condensing | 0% to 95% non-condensing |
Operating Altitude | r @ 0 to 10,000 ft with adequate airflow | @ 0 to 30,000 ft with adequate airflow | @ 0 to 30,000 ft | @ 0 to 60,000 ft |
Conformal Coating | No | Optional (default acrylic 1B31) | Yes (default acrylic 1B31) | Yes (default acrylic 1B31) |
*Reference to ANSI-VITA standard VITA 47 (r2) for the listed parameters only. Temperature cycling or other not listed VITA 47 requirements on demand
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